Oberon - RetroBIOS

Type	libretro
Source	https://github.com/libretro/oberon-risc-emu
Version	2020-07-01
Profiled	2026-03-18
Cores	oberon
Systems	oberon

No BIOS or firmware files required. This core is self-contained.

{'architecture': 'Custom 32-bit RISC CPU (25 MHz emulated) with 1 MB RAM (expandable to 32 MB). Monochrome 1-bit framebuffer. Keyboard input via PS/2 scancodes. SPI bus for SD card (disk image) access. Serial port for PCLink file transfer.\n', 'boot_process': 'CPU starts execution at ROM address 0xFFFFF800. The embedded bootloader reads the boot sector from the SPI disk and loads the Oberon inner core (modules Kernel, FileDir, Files, Modules) into RAM, then jumps to it.\n', 'content_format': 'Disk images (.dsk) are raw sector images read via 512-byte SPI commands. The core detects filesystem-only images (magic 0x9B1EA38D at sector 0) and adjusts the sector offset accordingly (disk.c:57-58).\n'}

Generated on 2026-03-20T19:12:20Z